Class Description

Course_ID: MYE010

Weekly Hours: 5

Semester: >=6

ECTS Credits: 5

Course Homepage:

Description: Introduction and challenges in VLSI testing. Automatic test pattern generation. Fault simulation. Design for testability (DfT). Scan testing and architectures (full scan, partial scan, at-speed scan testing). Built-in self testing – BIST (pattern generation, output response analysis, architectures). Logic diagnosis. On-line testing.