Class Description

Course_ID: MYY406

Weekly Hours: 5

Semester: 4

ECTS Credits: 6

Course Homepage: http://ecourse.uoi.gr/enrol/index.php?id=1534

Description: Design entry with CAD tools, Elementary Digital-Arithmetic Circuits, RTL Design, Design of Digital Circuits with VHDL (Basic & Composite Data Types, Behavioral & Structural Modeling, Subroutines, Packages, Libraries, Simulation, Synthesizable units with VHDL), Memories, Back-End (Partitioning, Floorplanning, Placement, Global & Detailed Routing), Programmable Devices (PLAs, PLDs, CPLDs), Field Programmable Gate Arrays), Input/Output